Blender 2.79b (and RC 2.80) require opengl32.dll be present before Blender will open (Windows 10)

T

Tom

Blender 2.79b and 2.80 does not load unless I place the opengl32.dll file in the Blender directory. I've gone through all of the drivers I know to update but still no luck. Even placing the opengl32.dll file in the directory does not allow me to load previous .blend files.

Windows 10 Home
V 10.0.18362
i7-8750H CPU @ 2.20GHz, 2208 Mhz, 6 Core(s), 12 Logical Processor(s)
NVIDIA GeForce GTX 1050 Ti

Update on 7/19.
Went to Nvidia website (thank you) and downloaded the latest driver. Ran the blender_debug_gpu cmd from 2.80 with exactly the same result. The results:

Code: 
Switching to fully guarded memory allocator.
Blender 2.80 (sub 74)
Build: Thu 07/11/2019 09:59 AM Windows 
argv[0] = blender
argv[1] = --debug
argv[2] = --python-expr
argv[3] = import bpy; bpy.ops.wm.sysinfo(filepath=r'C:\Users\xxxxx\AppData\Local\Temp\blender\debug_logs\blender_system_info.txt')
read file 
  Version 280 sub 39 date unknown hash unknown
Error   : Unrecognized Exception
Address : 0x00007FFC3FC7A839
Module  : C:\WINDOWS\System32\KERNELBASE.dll

This is a new computer so I'm almost to the point of returning it if I can get this figured out. Thanks for everyone's help.
 

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DJANGO: Erro no CCS após deploy: because its MIME type ('text/html') is not a supported stylesheet MIME type, and strict MIME checking is enabled

Opa, tudo bom?

Preciso de uma ajuda num código e ele está setado aqui: https://github.com/nogD3V/blog-posts-django, caso precisem verificar os arquivos.

Foi feito deploy do site no pythonanywhere.

Estava seguindo um tutorial do site https://tutorial.djangogirls.org/pt e após chegar no ultimo passo, deu erro no CSS em produção. Local está 100% funcional, mas quando sobe o código, gera o erro: [erro do site em produção][1] [1]: https://i.sstatic.net/wFlTZ6Y8.png

Esse é o link do site: https://nogd3v.pythonanywhere.com

erro: nogd3v.pythonanywhere.com/:1 Refused to apply style from 'https://nogd3v.pythonanywhere.com/static/css/blog.css' because its MIME type ('text/html') is not a supported stylesheet MIME type, and strict MIME checking is enabled.

How to capture output of adder?

  • Shawn-HR
  • Physics
  • Replies: 0
I am experimenting with a circuit for adding two numbers represented by two digital counters and two cascaded 4 bits adders (74HC283). I tested separately with cascaded 74HC163 and with asynchronous 74HC4040 counters and I ended up with the same results.

enter image description here

I feed one of the counters with a 1 kHz com signal and the second counter with 512 Hz signals. All signals are well formed square signals.

I use a 16Hz crystal-controlled time base. The counters count during logic high of the time base that is 1/32 second or about 31 milliseconds. The counters are reset in the second half of the logic-low of the time base.

When I verify the outputs of the first counter, my oscilloscope shows pulses at some of the outputs and I consider them as logic high. The output of the first counter is binary 00011111 to represent the 1kHz clk input, almost as expected. The output of the second counter is binary 00001111 to represent the 512 Hz clk input also during the 1/32 sec. So far so good because I can read the output of the counters correctly.

I feed input a[] of the cascaded adders by the outputs of the first counter and input b[] of the adders by outputs of the second counter. I expect to see the same pulsing output pins of the adders to show the correct sum. My expectation is to see the correct sum as the binary number 00101110 at output s[] of the 8 bits adder, the same way that I see the correct binary numbers at the pulsing pins of the two counters.

Instead, I see binary 00111111 as the sum.

If I change the clk input of the first counter to 2kHz and I leave the clk input of the second counter as it was 512 Hz, I see binary number 01111111 instead of the correct sum 01001110 as sum at outputs s[] of the adder.

If I change the clk input of the first counter to 512kHz like the second counter, I see the correct output of 00011110 as sum at outputs s[] of the adder.

I understand that as the counter is cycling through the addition is performed. My thoughts are that the total propagation delay of the counters and the adders is in the order of hundreds of nanoseconds but the counters are not counting for many milliseconds before they are reset.

My expectation is to see the correct sum at output s[] of the adder at their pulsing output pins while the counters are counting during the logic high of the time base.

I mean, I expect to see the right output of the adders at their pulsing output pins just like I can see the right output of the counters at their pulsing output pins. Is my expectation justified while counters periodically pause counting? If so, why do I get the wrong sum?

Please note that it is not about what kind of counters I am using. It is about the wrong sum no matter which counter I use.

¿Por qué if (typeof window !== 'undefined') y no if (window)?

He conseguido esto:

Code: 
if (typeof window !== 'undefined')
  window["..."]="loquesea";

Y me vengo preguntando ¿Por qué no puso simplemente?:

Code: 
if (window)
  ...

El segundo caso trae como ventaja que tiene 4 validaciones en este ejemplo: No acepta valores nullos, 0, falso y undefined. Es más corta la línea... Pero como he visto que no es el unico que lo pone me pregunto, ¿por qué lo hacen y qué ventaja tiene hacerlo?

How do I save my group project and my mark?

  • strawberrycow
  • Education
  • Replies: 0
I'm concerned about two members in my Marketing Simulation school group project this year. Let's call them Member A and Member B, respectively, in this. Besides me, there are 5 members in this group.

Member A:


  • Informed the group that he would be away for 10-12 days for personal reasons, but ended up being away for 3 whole weeks, and he didn't respond to any of my messages (or my groupmates' messages).


  • He wanted everyone to give each other 100% on the peer review regardless of what happened.


  • I noticed he used generative AI in his presentation, and he even admitted to using AI when I asked him. He claimed he edited the text but the editing history shows he didn't.

Member B:

  • Asked me if this project is about the marketing simulator or about the textbook (which, in short, the title of the assignment was "Marketing Simulator Presentation")
  • Apologized for not putting in enough work after I expressed my concerns, only to miss the rough draft deadline (that was agreed upon by all members) anyways.
  • Claimed that they put their part of their work in the document and slides, but no editing history of them doing so existed.
  • They ended up doing their work later but made a whole new ppt presentation even though a link dedicated to the ppt was sent to the whole group.
  • The teacher even said to them when he saw our slides and went to their section, "I don't know what the heck you're talking about."

I'm mainly worried because a group project because this is worth at least 20%, and if one member gets caught using AI, the whole group may get a 0. It's just a bit stressful because it's too late to kick the members out of this project, and I have not one but two members to worry about. The majority of the grade will be marked as a group, not individually. I'm also scared that if I were to tell the teacher, my group mates would give me a bad mark on the peer review. What should I do?

How do i write my synopsis design constraint(sdc) for a generated clock with a variable frequency?

  • Mister Moron
  • Physics
  • Replies: 0
Here is what I got so far for my SDC:

create_clock -name clk -period 20 -waveform {1.7 19}

This is the part of my verilog code that derives a variable frequency clock(Rx_clk) from a 50MHz clock:

Code: 
module BaudControl(
    input clk, //50MHz clk
    input [2:0]BC, //baud controller conditions controlled by user
    output reg Rx_clk //Clk with modified BPS
);

    //top 5 most used baud rates
    //50Mhz/bps=clkfrequency/bps
    parameter Baud_9600 = 9'd434; //9600 bauds * 12 = 112500 bps;
    parameter Baud_19200 = 9'd217; //19200 bauds * 12 = 230400 bps;
    parameter Baud_38400 = 9'd109; //38400 bauds * 12 =  460800 bps; with 108=462963bps
    parameter Baud_57600 = 9'd72; //57600 bauds * 12 = 691200 bps; 694444
    parameter Baud_115200 = 9'd36; //115200 bauds * 12 = 1382400 bps;


    reg [8:0] Cntr = 9'd0; //counter register
    reg [8:0] Max_Cntr1; //max counter register
    wire [8:0] Max_Cntr; //net for the max counter
        
    //BC conditions that picks the baud rate 
    assign Max_Cntr=(~BC[2]&~BC[1]&BC[0])?Baud_19200:(~BC[2]&BC[1]&~BC[0])?Baud_38400:(~BC[2]&BC[1]&BC[0])?Baud_57600:(BC[2]&~BC[1]&~BC[0])?Baud_115200:Baud_9600;
    
    always@(posedge clk) begin //loads the value of the max counter
        Max_Cntr1 <= Max_Cntr;
    end
        
    
    always@(posedge clk) begin //updates and increments the counter
        if(Cntr==Max_Cntr1) 
            Cntr <= 9'd0;
        else
            Cntr <= Cntr + 1'b1;
    end
    
    always@(*) begin //toggles Txo_clk
        if(Cntr==Max_Cntr1)
            Rx_clk <= 1'b1;
        else
            Rx_clk <= 1'b0;
    end
    
    
endmodule

Also, if you have a a criticism about my code please mention it. I am a self-taught and would love to get some input.

Execution profile for web server

  • und3rd06012
  • Technology
  • Replies: 0
I would like to know if there is a way to run an app to exhaustion in terms of all possible outcomes that it can provide.

What do I mean by that:

Let's assume that someone has an (Apache) HTTP Server. What I am trying to do is to create profiles of nominal execution of this http server. These profiles will then be used as a sandbox/wrapper for this specific app and if the app executes anything else other than that (due to malicious activity to the app such as code injection) to halt the execution and throw a warning.

So to make it more clear let's assume that the execution of an app is completely deterministic.

We know from the start that the app will output either the number 30, either the number -5 or the number 0. If the app, for example, outputs any other number other than the aforementioned ones then I need to show an error. Or maybe if it outputs a string or a char then again I need to throw an error, because we are expecting only the numbers 30, -5 or 0.

To make it more realistic:

What I am trying to do is to somehow exhaust all possible execution outcomes of an http server and audit what calls it makes on the linux kernel. That way, I could profile how it normally interacts with the kernel considering all normal executions and then compare these/this profile(s) with real life executions. If at some point, the real-life executions diverge from these/this profile(s) then I should display a message that something is off.

Now you may wonder that if for example the server receives a software update then its execution may diverge because the source code changed from the previous version. And you are right. But let's assume that we stick with a specific version and we do not move from there no matter if there are updates or not. So we profile only one version of the http server.

What I have tried to do so far is to download apache and run an strace and at the same time send http requests via postman. But it seems that it is not very helpful as I do not see much difference in the strace logs.

So is it possible to create such profiles?

You could provide real-life scenarios with apache server (if possible) or any other http server that may be easier.

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In RSA, can having a part of e allow for solving it?

I encountered this problem,the core is as follows.I have n and c,but I only have part of e，The 200 bits of e are zeroed out.

Code: 
nbits = 512
p = getPrime(nbits)
q = getPrime(nbits)
n = p * q
phi = (p-1) * (q-1)
while True:
    kk = getPrime(128)
    rr = kk + 2
    e = 65537 + kk * p + rr * ((p+1) * (q+1)) + 1
    if gcd(e, phi) == 1:
        break
m = bytes_to_long(flag)
c = pow(m, e, n)

e = e >> 200 << 200
print(f'n = {n}')
print(f'e = {e}')
print(f'c = {c}')
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